The Department of Computer Science and Engineering conducted two-day hands-on workshop titled “Hands-on Workshop on RISC-V Assembly Programming using Ripes Simulator.” The workshop was organized to provide students with practical exposure to RISC-V Assembly Programming and to strengthen their understanding of Computer Organization and Architecture (COA) concepts through simulation-based learning. The workshop was conducted by Mr. Boobalan T., M.E., (Ph.D), CTO, R2C Technologies, Coimbatore. Mr. Boobalan shared his industry expertise and academic knowledge in RISC-V architecture and processor design. He provided detailed explanations of RISC-V instruction formats, register organization, and assembly programming concepts. Through live demonstrations using the RIPES simulator, he illustrated how instructions are executed inside the CPU and how data flows through different components of the processor.
