Workshop on Digital Design using verilog HDL

Workshop on Digital Design using verilog HDL

The Department of Computer Science and Engineering successfully organized a hands-on workshop on “Digital Design using verilog HDL” for S3 CSE A & B Batch students today.
The workshop focused on practical aspects of Verilog HDL and digital system modeling.

The session provided students with valuable hands-on exposure to designing and modeling digital circuits using Verilog. The interactive nature of the workshop helped students connect theoretical concepts with practical implementation and simulation.